1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device having a cylinder-type capacitor structure.
Priority is claimed on Japanese Patent Application No. 2007-222932, filed Aug. 29, 2007, the contents of which are incorporated herein by reference.
2. Description of Related Art
In semiconductor devices such as a DRAM (dynamic random access memory) or the like, finer memory cells have been formed in accordance with progress in fine processing techniques, and the amount of charge stored in a capacitor, which forms each memory cell, has been decreased.
More specifically, the finer the memory cell of a DRAM, the smaller the occupied area of the relevant capacitor. In order to obtain a specific capacity (of the capacitor) in the limited occupied area, the capacitor must have a three-dimensional electrode structure, so as to increase the surface area of the electrodes.
In consideration of the above, a cylinder-type capacitor structure has been proposed, which has (i) a plurality of cylinder holes formed in an inter-layer insulating film, (ii) a lower electrode which has a pipe form having a bottom, and is formed so as to cover the bottom and side faces of each cylinder hole, (iii) a capacitance insulating film which covers the inter-layer insulating film and the lower electrodes, and (iv) an upper electrode which covers the capacitance insulating film. In this cylinder-type capacitor structure, the surface area of the electrodes is increased by increasing the ratio (called an “aspect ratios”) of the height to the bottom surface of each of the lower electrodes which are arranged at regular intervals.
When forming such a cylinder-type capacitor structure, as shown in FIGS. 12A and 12B, an inter-layer insulating film 101 is formed, and a plurality of cylinder holes 102 are arranged by means of dry etching, where the cylinder holes 102 pass through the inter-layer insulating film 101, and are positioned immediately on contact pads 202 which are exposed through the openings formed in a cylinder stopper 201 provided for selection transistors.
If memory cells have a finer form, each signal cylinder hole 102, which has a high aspect ratio, has a bowing shape in which a part in the vicinity of the corresponding opening 102a is widened like a barrel. Such a bowing shape is unavoidable with regard to dry etching, and is the most difficult element to control in consideration of the progress of fine processing. That is, when the capacitor structure has a finer form, it is difficult to provide a specific distance between separate cylinder holes which are arranged at regular intervals, and to control the short margin of the lower electrode formed in each cylinder hole 102.
Additionally, in order to form the above-described cylinder-type capacitor structure, as shown in FIG. 13, after a lower electrode 103, which has a pipe form having the bottom so as to cover the bottom and side faces of each cylinder hole 102, is formed, the inter-layer insulating film 101 is removed by means of wet processing. However, each lower electrode 103 having the above-described shape tends to fall during the wet processing, and if it falls or breaks, a short circuit or breakage occurs between the relevant electrodes, which causes a short capacitance or an operational default.
In consideration of the above, the lower electrodes, which are arranged at regular intervals, are coupled with each other via insulating films, so as to prevent the lower electrodes from falling (see, for example, Patent Documents 1 and 2). However, the present inventors have recognized that Patent Documents 1 and 2 disclose or indicate no technique for reducing a bowing shape of each cylinder hole 102 when it is formed.    Patent Document 1: Japanese Unexamined Patent Application, First Publication No. 2003-297952.    Patent Document 1: Japanese Unexamined Patent Application, First Publication No. 2005-32982.